The Sparc-Sulima Complete UltraSPARC SMP Simulator Project
The Sparc-Sulima Project began as part of the
ANU-Fujitsu CAP Program, Phase III.
It is continuing under the
CC-NUMA Project
Objectives
The objective of this Project is to build an SMP simulator which
captures kernel-level and user-level activity, captures thread / process
interactions, can produce traces, and can simulate applications from
compiled SPARC V9 binaries.
The simulator must be robust and constructed so that it is easily
extensible, for example to model new versions of a SPARC V9 processor.
It is also important that the simulator has acceptable efficiency and
any required third party software is under Open Source licences.
Approach
Our approach to these objectives is to use a complete machine simulator,
which has the greatest potential accuracy in terms of the interleavings
of memory operations in an SMP.
For the purpose of analysing memory operations, cycle-accurate
simulation is not essential. Thus only a simple pipeline (one-stage with
no instruction grouping) is simulated, as this results in large savings
in simplicity and performance.
Currently, the main Sparc-Suilma `core', the UltraSAN
UltraSPARC CPU simulator, performs functional emulation by
a standard fetch-decode-execute cycle. Various optimizations have been
applied to achieve slowdowns of the range 200-400.
We have chosen to base our approach on the Sulima ISA Simulator, initially
develop for MIPS64/L4 simulation by Patryk Zadarnowski. This is due to its
availability of source codes, and its relatively tractable OO approach.
Documentation and Source Code Availability
Version 0.1 alpha of the source codes are were released in December
2001; most files (gnererally the Sparc-dependent ones) are released
under the GPL; files
relating to general Sulima infrastructure are under a BSD-style license.
Download the (gzipped) tar file from here, and the Sparc-Sulima manual from here (54 pages, 160K).
Version 0.2 alpha was released in September 2002. Download the
(gzipped) tar file from here, the
required version of SWIG from here, and the Sparc-Sulima manual
from here.
Version 0.3 was released in February 2004.
Download the (gzipped) tar file from here (992 KBytes), and the Sparc-Sulima
manual from here (196 KBytes).
Version 0.4 was released in October 2006.
Download the (gzipped) tar file from here 3500 kbyes) , and the Sparc-Sulima
manual from here (424 KBytes).
The Sparc-Sulima Research Team and Contact
The current Sparc-Sulima team members are
Andrew Over
and
Peter Strazdins.
Former team members include
Bill Clarke,
Adam Czezowski
and Patrick Fagan.
The team collectively can be contacted at
sim-devel[at]ccnuma.anu.edu.au.
Other contributors include:
-
Markus Watts, from the University of Michigan ITCS Umich Systems Group
who has interests in Sparc BSD, who developed code enabling Sparc-Sulima
to run on non-SPARC hosts
(integrated into the main Sparc-Sulima source tree in late 2003)
- Andreas Pfeil, who has worked on checkpointing infrastructure (2003-4)
- Mark Thorne, who prototyped a parallel version of the simulator (2004)
- Yan Zhang, who performed some preliminary validation work
using the NAS Parallel Benchmarks
Publications
-
Andrew Over, Bill Clarke and Peter Strazdins
A Comparison of Two Approaches to Parallel
Simulation of Multiprocessors
,
2007 IEEE International Symposium on Performance Analysis of Systems and
Software (ISPASS'07), San Hose, April, 2007.
- Peter Strazdins, Bill Clarke and Andrew Over,
Efficient Cycle-Accurate Simulation of the UltraSPARC III CPU,
CRPITS '07: Proceedings of the Thirtieth Australasian
Conference on Computer Science, Ballarat, Australia,
January 2007.
- Andrew Over, Peter Strazdins and Bill Clarke,
Cycle Accurate
Memory Modelling: A Case-Study in Validation, in Proceedings of the IEEE
International Symposium on Modeling, Analysis, and Simulation
(MASCOTS'05), pages 85-94, Atlanta, IEEE, September 2005.
-
Bill Clarke,
Solemn: Solaris emulation mode for Sparc Sulima,
(02/04).
-
Bill Clarke, Adam Czezowski and Peter Strazdins,
Implementation Aspects of a Sparc V9 Complete Machine Simulator ,
(11/01). There is also a talk (01/02).
-
Peter Strazdins,
A Survey of Simulation Tools for CAP Project Phase III
, (10/00)
- Bill Clarke,
SPARC V9 Instruction Set Specification
, (10/00)
See also the relevant chapters in the CAP Program Report for
2000 and
2001
Related Links
PETER STRAZDINS
2008-02-21